(1) Field of the Invention
The present invention relates generally to radio frequency (RF) signal receivers and, more particularly, to a radio frequency receiver having a common dual-mode physical layer architecture capable of receiving and converting to baseband, both direct sequence spread spectrum signals and frequency hopping spread spectrum signals.
(2) Description of the Prior Art
The emergence of the Information Age has resulted in the need to connect virtually all computers into some type of network. Traditionally, groups of computers were networked together through direct, hard-wired connections to form local area networks (LAN), which are often connected to additional networks. Significant expense is associated with running cabling in new structures, as well as replacing, repairing or adding cabling to existing structures. Further, it is difficult to predict the preferred placement for receptacles and location of cabling. In order to eliminate the difficulties associated with cabling and to provide more flexibility in configuring and adding to existing local area networks, wireless local area networks (WLAN) have evolved. These wireless local area networks use radio frequency communications to replace the physical transmission medium of cables. Wireless local area networks are capable of using any number of analog and digital modulation techniques and protocols. In an effort to accommodate multiple modulation techniques, transceivers in wireless local area networks may be configured to deal with multiple modulation techniques.
One known direct conversion receiver for accommodating multiple modulation techniques uses a sample and hold circuit for subsampling an input signal. The output of the sample and hold circuit is applied to a sigma-delta loop to provide a high-speed, low-resolution data stream that in turn is applied to a decimator that provides a high-precision, low data rate signal having quadrature outputs. The above sigma-delta loop utilizes a bandwidth selection signal to select one of a preselected set of conversion bandwidths. In this way, only those signals which are of importance for receiving the modulated information are processed through the sigma-delta loop.
In view of the above, a receiver that is adaptable to multiple protocols and that uses a fixed A/D conversion rate delta-sigma converter is desirable, since such an architecture offers simplicity of design and will generally occupy less area on an integrated circuit than a similar device that uses a sigma-delta converter having a variable bandwidth.
The present invention is directed to a common receiver architecture for the conversion of RF signals to baseband for both direct sequence spread spectrum (DSSS) and frequency hopping spread spectrum (FHSS) signals. The receiver employs a low-pass delta-sigma modulator as an A/D converter, thereby taking advantage of the noise shaping properties of the quantization noise associated with the delta-sigma modulator. By utilizing an oversampling A/D converter with noise shaping, such as a delta-sigma modulator, the reduced bandwidth requirements for FHSS mode signals can be used to increase the resolution in the data path, enabling demodulation of Gaussian shaped Frequency Shift Keying (GFSK) waveforms. Any DC offset problems can be eliminated by incorporating a carrier error that is large relative to any deviation associated with a received waveform. In this way, errors contributed by DC components will be minimized.
The quantization noise in a low-pass delta-sigma modulator is shaped with lower frequencies containing less quantization noise than higher frequencies. The bandwidth requirements for FHSS are much less than the requirements for DSSS of a common data rate. This reduction in bandwidth in the FHSS waveform allows for an increased number of effective bits out of the delta-sigma modulator by simply placing a low-pass filter on the output of the delta-sigma modulator. Since the bandwidth is larger in the DSSS mode, the bandwidth of the low-pass filter on the output of the delta-sigma modulator can simply be increased to allow more quantization noise to exist at the output of the low-pass filter, thereby decreasing the effective number of bits, but still allowing for the resolution necessary to perform DSSS demodulation. The aforesaid reduction in bandwidth in the FHSS mode allows for the increased resolution necessary to perform FHSS demodulation.
The present invention comprises a low-pass delta-sigma modulator that is implemented as an A/D converter. The A/D converter is followed by a low-pass filter having a variable bandwidth. When demodulating DSSS signals, the bandwidth of the low-pass filter is adjusted to that necessary to capture the DSSS signals. When demodulating FHSS signals, the bandwidth of the low-pass filter is reduced to that necessary to capture the FHSS signals. Due to the noise shaping properties of the A/D converter, the low-pass filter effectively eliminates enough high end quantization noise at the output of the A/D converter to provide the resolution necessary for both DSSS and FHSS demodulation.
Accordingly, one feature of the present invention includes provision of a common architecture dual-mode physical layer capable of performing both DSSS and FHSS demodulation.
Another feature of the present invention includes provision of a receiver that is integrated on a single integrated circuit chip, and that is useable in a wireless local area network to receive both DSSS and FHSS signals.